The grain size effect on phase growth rate in the Cu-Sn system
The current trends of development of microelectronics require reduction of the sizes of chips and density increasing. In turn, it requires high-quality approaches to production of electronic devices. One of reasons of destruction of tracks of printed circuit boards of chips is formation of pores, their growth and transformation into microcracks.
Physical process which forms of voids in Cu-Sn system was investigated and presented in papers [5,6,7]. In case of heating up of solder joints on Cu-Sn boundary as a result of reactionary diffusion the phase Cu6Sn5 and phase Cu3Sn are formed. Through a certain period the phase Cu3Sn "eats" the phase Cu6Sn5 and thus on interphases there voidis formed. Formation of pores is caused by Kirkendall effect.
Further pores integrate and turn into microcracks that leads to distraction of soldering joints. Experimental investigations showed that similar process occurs in Cu-Sn system where the plate of copper is covered with a tin film. Tin was applied on copper plates with different grains by the galvanic method.
It has been stated by Haila that increasing size of copper grains influences of deceleration of rate of pores formation. The present paper is devoted to this subject. In the work it has been investigated dependence between rate of phase Cu6Sn5+Cu3Sn growth and size of cooper graines.
Experiment was made at two different temperatures 250 0C and 270 0C It has been stated that the increasing of grains sizes on plates of copper reduces the growth rate of the phases Cu6Sn5+Cu3Sn. The results received in the present paper confirm the Haila`s investigations, because under condition of slow diffusion the growth of pores is respectively decelerated.
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